20 ott
|
Nokia
|
San Donnino di Liguria
20 ott
Nokia
San Donnino di Liguria
Nokia seeks an experienced ASIC physical design engineer to implement floorplanning, place & route, and power/clock distribution for submicron nodes. You will work with a hardware/RTL team to translate designs into silicon and optimize flows. xbvzest
Tutti i potenziali candidati sono invitati a leggere con attenzione i seguenti dettagli prima di inviare la propria candidatura.
This role emphasizes collaboration across cross-functional teams, verification rigor, and automation, with hybrid work and strong learning opportunities in latest nodes and tools.
📌 SoC Physical Design Engineer: Floorplanning, Timing (San Donnino di Liguria)
🏢 Nokia
📍 San Donnino di Liguria