pams OSRAM is seeking a Principal HS Digital Place Route Engineer to lead high-speed digital physical implementation from synthesis through sign-off and tape-out, in a PCIe/SerDes rich environment, based in Pavia, Italy. You will define back-end flows, drive PPA targets, and mentor a team across multiple projects. /ppThe role requires a PhD or MSc in Electrical Engineering with 10+ years in digital backend design, strong Cadence experience, and deep knowledge of floorplanning, routing, and timing /p #J-18808-Ljbffr
📌 Senior Digital P&R Architect — High-Speed ICs Lead (Bardi)
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